CD4027 双J-K触发器 NSC/MOT/TI
CD4027是包含了2个相互独立的、互补对称的J-K主从触发器的单片集成电路。每个触发器分别提供了J、K置位、复位和时钟输入信号及经过缓冲的Q和Q输出信号,输入输出引出端排列与CC4013双D型触发器相似。CC4027可用于性能控制、寄存器和触发器等电路。加在J、K输入端的逻辑电平通过内部自行调整来控制每个触发器的状态,在时钟脉冲上升沿改变触发器状态,置位和复位功能与时钟无关,均为高电平有效。
从图可知,内部含有两套相同的JK触发器,(1)和(2)为输出端,(3)脚为前级时钟输入,(4)和(7)脚分别是复位和更新脚,本电路要将其接低电平,(5)和(6)脚为JK端,需接高电平。从(1)脚输出的信号既是所需要的1HZ方波。
Truth Table 真值表功能:
输入Inputs tn−1 (Note 1) | 输出Outputs tn (Note 2) | ||||||
CL (Note3) | J | K | S | R | Q | Q | Q |
↑ | I | X | O | O | O | I | O |
↑ | X | O | O | O | I | I | O |
↑ | O | X | O | O | O | O | I |
↑ | X | I | O | O | I | O | I |
↓ | X | X | O | O | X | (No Change) | |
X | X | X | I | O | X | I | O |
X | X | X | O | I | X | O | I |
X | X | X | I | I | X | I | I |
CD4027逻辑图 |
CD4027引脚图 |
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DC Supply Voltage 直流供电电压 (VDD) | −0.5 VDC to +18 VDC |
Input Voltage输入电压 (VIN) | −0.5V to VDD +0.5 VDC |
Storage Temperature Range储存温度范围 (TS) | −65℃ to +150℃ |
Power Dissipation功耗 (PD) | |
Dual-In-Line 普通双列封装 | 700 mW |
Small Outline 小外形封装 | 500 mW |
Lead Temperature 焊接温度(TL) | |
Soldering, 10 seconds)(焊接10秒) | 260℃ |
Recommended Operating Conditions 建议操作条件:
DC Supply Voltage 直流供电电压 (VDD) | 3V to 15 VDC |
Input Voltage输入电压 (VIN) | 0V to VDD VDC |
Operating Temperature Range工作温度围 (TA) | −55℃ to +125℃ |
DC Electrical Characteristics 直流电气特性:
Symbol 符号 | Parameter 参数 | Conditions 条件 | −55℃ | +25℃ | +125℃ |
Units 单位 |
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最小 | 最大 | 最小 | 典型 | 最大 | 最小 | 最大 | ||||
IDD | Quiescent Device Current静态电流 | VDD=5V,VIN=VDD or VSS | 1 | 1 | 30 | μA | ||||
VDD=10V,VIN=VDD or VSS | 2 | 2 | 60 | |||||||
VDD=15V,VIN=VDD or VSS | 4 | 4 | 120 | |||||||
VOL | LOW Level Output Voltage 输出低电平电压 | |IO| < 1 μA | ||||||||
VDD = 5V | 0.05 | 0 | 0.05 | 0.05 | V | |||||
VDD = 10V | 0.05 | 0 | 0.05 | 0.05 | ||||||
VDD = 15V | 0.05 | 0 | 0.05 | 0.05 | ||||||
VOH | HIGH Level Output Voltage 输出高电平电压 | |IO| < 1 μA | ||||||||
VDD = 5V | 4.95 | 4.95 | 5 | 4.95 | V | |||||
VDD = 10V | 9.95 | 9.95 | 10 | 9.95 | ||||||
VDD = 15V | 14.95 | 14.95 | 15 | 14.95 | ||||||
VIL | LOW Level Input Voltage 输入低电平电压 | VDD=5V,VO=0.5V or 4.5V | 1.5 | 1.5 | 1.5 | V | ||||
VDD=10V, VO=1V or 9V | 3.0 | 3.0 | 3.0 | |||||||
VDD=15V,VO=1.5V or 13.5V | 4.0 | 4.0 | 4.0 | |||||||
VIH | HIGH Level Input Voltage 输入高电平电压 | VDD=5V,VO=0.5V or 4.5V | 3.5 | 3.5 | 3.5 | V | ||||
VDD=10V,VO=1V or 9V | 7.0 | 7.0 | 7.0 | |||||||
VDD=15V,VO=1.5V or 13.5V | 11.0 | 11.0 | 11.0 | |||||||
IOL | LOW Level Output Current 输出低电平电流 (Note 7) | VDD = 5V, VO = 0.4V | 0.64 | 0.51 | 0.88 | 0.36 | mA | |||
VDD = 10V, VO = 0.5V | 1.6 | 1.3 | 2.25 | 0.9 | ||||||
VDD = 15V, VO = 1.5V | 4.2 | 3.4 | 8.8 | 2.4 | ||||||
IOH | HIGH Level Output Current 输出高电平电流 (Note 7) | VDD = 5V, VO = 4.6V | −0.64 | −0.51 | −0.88 | −0.36 | mA | |||
VDD = 10V, VO = 9.5V | −1.6 | −1.3 | −2.25 | −0.9 | ||||||
VDD = 15V, VO = 13.5V | −4.2 | −3.4 | −8.8 | −2.4 | ||||||
IIN | Input Current 输入电流 | VDD = 15V, VIN = 0V | −0.1 | −10−5 | −0.1 | −1.0 | μA | |||
VDD = 15V, VIN = 15V | 0.1 | 10−5 | 0.1 | 1.0 |
AC Electrical Characteristics 交流电气特性:
Symbol 符号 | Parameter 参数 | Conditions 条件 | 最小 | 典型 | 最大 | Units 单位 |
tPHL or tPLH | Propagation Delay Time from Clock to Q or Q 传播延迟时间从时钟至Q到Q | VDD = 5V | 200 | 400 | ns | |
VDD = 10V | 80 | 160 | ||||
VDD = 15V | 65 | 130 | ||||
tPHL or tPLH | Propagation Delay Time from Set to Q or Reset to Q 传播延迟时间设定为Q或重置到Q | VDD = 5V | 170 | 340 | ns | |
VDD = 10V | 70 | 140 | ||||
VDD = 15V | 55 | 110 | ||||
tPHL or tPLH | Propagation Delay Time from Set to Q or Reset to Q 传播延迟时间设定为Q或重置到Q | VDD = 5V | 110 | 220 | ns | |
VDD = 10V | 50 | 100 | ||||
VDD = 15V | 40 | 80 | ||||
tS | Minimum Data Setup Time 最小数据建立时间 | VDD = 5V | 135 | 270 | ns | |
VDD = 10V | 55 | 110 | ||||
VDD = 15V | 45 | 90 | ||||
tTHL or tTLH | Transition Time过渡时间 | VDD = 5V | 100 | 200 | ns | |
VDD = 10V | 50 | 100 | ||||
VDD = 15V | 40 | 80 | ||||
fCL | Maximum Clock Frequency 最大时钟频率 (Toggle Mode) | VDD = 5V | 2.5 | 5 | MHz | |
VDD = 10V | 6.2 | 12.5 | ||||
VDD = 15V | 7.6 | 15.5 | ||||
trCL or tfCL | Maximum Clock Rise and Fall Time最大时钟上升和下降时间 | VDD = 5V | 15 | μs | ||
VDD = 10V | 10 | |||||
VDD = 15V | 5 | |||||
tW | Minimum Clock Pulse Width 最小时钟脉冲宽度(tWH = tWL) | VDD = 5V | 100 | 200 | ns | |
VDD = 10V | 40 | 80 | ||||
VDD = 15V | 32 | 65 | ||||
tWH | Minimum Set and Reset Pulse Width最低限度和复位脉冲宽度 | VDD = 5V | 80 | 160 | ns | |
VDD = 10V | 30 | 60 | ||||
VDD = 15V | 25 | 50 | ||||
CIN | Average Input Capacitance 平均输入电容 | Any Input | 5 | 7.5 | pF | |
CPD | 功耗容量 | Per Flip-Flop | 35 | pF |
典型应用电路:
纹波二进制计数器