CD4553/CC4553是3位十进制计数器,但只有1个输出端,要完成3位输出,采用扫描输出方式,通过它的选通脉冲信号,依次控制3位十进制的输出,从而实现扫描显示方式。
引脚功能:
CLOCK:计数脉冲输入端,下调沿有效。
CIA、CIB:内部振荡器的外界电容端子。
MR:计数器清零(只清计数器部分),高电平有效。
LE:锁定允许。当该端为低电平时,3组计数器的内容分别进入3组锁存器,当该端为高电平时,锁存器锁定,计数器的值不能进入。
DIS:该端接地时,计数脉冲才能进行计数。
DS1、DS2、DS3:位选通扫描信号的输出,这3端能循环地输出低电平,供显示器作为位通控制。
Q0、Q1、Q2、Q3:BCD码输出端,它能分时轮流输出3组锁存器的BCD码。
CD4553内部虽然有3组BCD码计数器(计数最大值为999),但BCD的输出端却只有一组Q0~Q3通过内部的多路转换开关能分时输出个、十、百位的BCD码,相应地,也输出3位位选通信号。例如:当Q0~Q3输出个位的BCD码时,DS1端输出低电平;当Q0~Q3输出十位的BCD码时,DS2端输出低电平;当Q0~Q3输出百位的BCD码时,DS3端输出低电平时,周而复始、循环不止。
真值表:
Inputs 输入 |
Outputs 输出 | |||
Master Reset |
Clock | Disable | LE | |
0 | ↑ | 0 | 0 | No Change 没有变化 |
0 | ↓ | 0 | 0 | Advance 进行 |
0 | x | 1 | x | No Change 没有变化 |
0 | 1 | ↑ | 0 | Advance 进行 |
0 | 1 | ↓ | 0 | No Change 没有变化 |
0 | 0 | x | x | No Change 没有变化 |
0 | x | x | ↑ | Latched 锁存 |
0 | x | x | 1 | Latched 锁存 |
1 | x | x | 0 | Q0=Q1=Q2=Q3=0 |
图1 CD4553引脚图
最大额定值(电压参考的VSS ):
Symbol 符号 | Parameter 参数 | Value 数值 | Unit单位 |
VDD | DC Supply Voltage 直流供电电压 Range | -0.5 to +18.0 | V |
Vin, Vout | Input or Output Voltage Range(DC or Transient)输入或输出电压范围(直流或瞬态) | -0.5 to VDD +0.5 | V |
Iin | Input Current (DC or Transient) per Pin 输入电流( 直流或瞬态)每个引脚 | ±10 | mA |
Iout | Output Current (DC or Transient) per Pin 输出电流( 直流或瞬态)每个引脚 | +20 | mA |
PD | Power Dissipation, per Package (Note 2.) 功耗 | 500 | mW |
TA | Ambient Temperature Range 环境温度范围 | –55 to +125 | ℃ |
Tstg | Storage Temperature Range储存温度范围 | –65 to +150 | ℃ |
DC Electrical Characteristics 直流电气特性:
Characteristic 参数 |
符号 |
VDD Vdc | – 55℃ | 25℃ | 125℃ | Unit单位 | ||||||
最小 |
最大 |
最小 |
典型 |
最大 | 最小 | 最大 | ||||||
Output Voltage 输出电压 | Vdc | |||||||||||
Vin = VDD or 0 | “0” Level | VOL | 5.0 | 0.05 | 0 | 0.05 | — | 0.05 | ||||
10 | 0.05 | 0 | 0.05 | — | 0.05 | |||||||
15 | 0.05 | 0 | 0.05 | — | 0.05 | |||||||
Vin = 0 or VDD | “1” Level | VOH | 5.0 | 4.95 | 4.95 | 5.0 | 4.95 | Vdc | ||||
10 | 9.95 | 9.95 | 10 | 9.95 | ||||||||
15 | 14.95 | 14.95 | 15 | 14.95 | ||||||||
Input Voltage 输入电压 | Vdc | |||||||||||
(VO=4.5 or 0.5Vdc) | “0” Level | VIL | 5.0 | 1.5 | 2.25 | 1.5 | 1.5 | |||||
(VO=9.0 or 1.0Vdc) | 10 | 3.0 | 4.50 | 3.0 | 3.0 | |||||||
(VO=13.5or1.5Vdc) | 15 | 4.0 | 6.75 | 4.0 | 4.0 | |||||||
(VO=0.5 or 4.5Vdc) | “1” Level | VIH | 5.0 | 3.5 | 3.5 | 2.75 | 3.5 | Vdc | ||||
(VO=1.0 or 9.0Vdc) | 10 | 7.0 | 7.0 | 5.50 | 7.0 | |||||||
(VO=1.5 or13.5Vdc) | 15 | 11 | 11 | 8.25 | 11 | |||||||
Output Drive Current 输出驱动电流 | mAdc | |||||||||||
(VOH = 4.6 Vdc) | Source —Pin 3 | IOH | 5.0 | –0.25 | –0.2 | –0.36 | –0.14 | |||||
(VOH = 9.5 Vdc) | 10 | –0.62 | –0.5 | –0.9 | –0.35 | |||||||
(VOH =13.5 Vdc) | 15 | –1.8 | –1.5 | –3.5 | –1.1 | |||||||
(VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5Vdc) | Source -Other Outputs | 5.0 | –0.64 | –0.51 | –0.88 | –0.36 | mAdc | |||||
10 | –1.6 | –1.3 | –2.25 | –0.9 | ||||||||
15 | –4.2 | –3.4 | –8.8 | –2.4 | ||||||||
(VOL = 0.4 Vdc) (VOL = 0.5 Vdc)(VOL = 1.5 Vdc) | Sink - Pin 3 | IOL | 5.0 | 0.5 | 0.4 | 0.88 | 0.28 | mAdc | ||||
10 | 1.1 | 0.9 | 2.25 | 0.65 | ||||||||
15 | 1.8 | 1.5 | 8.8 | 1.20 | ||||||||
(VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) | Sink — Other Outputs | 5.0 | 3.0 | 2.5 | 4.0 | 1.6 | mAdc | |||||
10 | 6.0 | 5.0 | 8.0 | 3.5 | ||||||||
15 | 18 | 15 | 20 | 10 | ||||||||
Input Current 输入电流 | Iin | 15 | — | ±0.1 | — | ±0.00001 | ±0.1 | — | ±1.0 | μAdc | ||
Input Capacitance(Vin=0) 输入电容(输入电压= 0 ) | Cin | — | — | — | — | 5.0 | 7.5 | — | — | pF | ||
Quiescent Current (Per Package) MR = VDD 静态电流 | IDD | 5.0 | 5.0 | 0.010 | 5.0 | 150 | μAdc | |||||
10 | 10 | 0.020 | 10 | 300 | ||||||||
15 | 20 | 0.030 | 20 | 600 | ||||||||
Total Supply Current (Note 4., 5.) (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) | IT | 5.0 | IT = (0.35 mA/kHz) f + IDD | μAdc | ||||||||
10 | IT = (0.85 mA/kHz) f + IDD | |||||||||||
15 | IT = (1.50 mA/kHz) f + IDD |
交流开关特性:
Characteristic 参数 | Figure | Symbol 符号 | VDD | 最小 |
典型 |
最大 | Unit单位 |
Output Rise and Fall Time tTLH, tTHL = (1.5 ns/pF) CL + 25 ns tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns |
2a | tTLH, tTHL | 5.0 | 100 | 200 | ns | |
10 | 50 | 100 | |||||
15 | 40 | 80 | |||||
Clock to BCD Out 时钟的BCD输出 | 2a | tPLH, tPHL | 5.0 | 900 | 1800 | ns | |
10 | 500 | 1000 | |||||
15 | 200 | 400 | |||||
Clock to Overflow 时钟溢出 | 2a | tPHL | 5.0 | 600 | 1200 | ns | |
10 | 400 | 800 | |||||
15 | 200 | 400 | |||||
Reset to BCD Out 重的BCD输出 | 2b | tPHL | 5.0 | 900 | 1800 | ns | |
10 | 500 | 1000 | |||||
15 | 300 | 600 | |||||
Clock to Latch Enable Setup Time Master Reset to Latch Enable Setup Time | 2b | tsu | 5.0 | 600 | 300 | ns | |
10 | 400 | 200 | |||||
15 | 200 | 100 | |||||
Removal Time Latch Enable to Clock | 2b | trem | 5.0 | –80 | –200 | ns | |
10 | –10 | –70 | |||||
15 | 0 | –50 | |||||
Clock Pulse Width 时钟脉冲宽度 | 2a | tWH(cl) | 5.0 | 550 | 275 | ns | |
10 | 200 | 100 | |||||
15 | 150 | 75 | |||||
Reset Pulse Width 复位脉冲宽度 | 2b | tWH(R) | 5.0 | 1200 | 600 | ns | |
10 | 600 | 300 | |||||
15 | 450 | 225 | |||||
Reset Removal Time 重置移走时间 | — | trem | 5.0 | –80 | –180 | ns | |
10 | 0 | –50 | |||||
15 | 20 | –30 | |||||
Input Clock Frequency 输入时钟频率 | 2a | fcl | 5.0 | 1.5 | 0.9 | MHz | |
10 | 5.0 | 2.5 | |||||
15 | 7.0 | 3.5 | |||||
Input Clock Rise Time 输入时钟上升时间 | 2b | tTLH | 5.0 | No Limit 没有限制 | ns | ||
10 | |||||||
15 | |||||||
Disable, MR, Latch Enable Rise and Fall Times | — | tTLH, tTHL | 5.0 | 15 | ms | ||
10 | 5.0 | ||||||
15 | 4.0 | ||||||
Scan Oscillator Frequency (C1 measured in mF) | 1 | fosc | 5.0 | 1.5/C1 | Hz | ||
10 | 4.2/C1 | ||||||
15 | 7.0/C1 |
图2 CD4553 3位数计数器时序图(参考图4) 图3 CD4553 开关时间测试电路和波形 图4 CD4553方框图 |
6位数显示电路图 |